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ACYCLIC GRAPH  look up translate image
a graph without any cycles.
ADAPTIVE  look up translate image
Taking available information into account. For example, an adaptive mesh-generating algorithm generates a finer resolution mesh near to discontinuities such as boundaries and corners. An adaptive routing algorithm may send identical messages in different directions at different times depending on the local density information it has on message traffic. See also oblivious
ADDRESS GENERATION  look up translate image
a cycle during execution of an instruction in which an effective address is calculated by means of indexing or indirect addressing.
ADDRESS MASK  look up translate image
in internet communications, a 32 bit long mask used to select an IP address for subnet addressing. The mask selects the network portion of the IP address and one or more bits of the local LAN address.
ADDRESS SPACE  look up translate image
A region of a computer's total memory within which addresses are contiguous and may refer to one another directly. A shared memory computer has only one user-visible address space; a disjoint memory computer can have several.
ADDRESS TRANSLATION  look up translate image
in networking, the process of converting external addresses into standardized network addresses and vice versa. This facilitates the interconnection of multiple networks which each have their own address plan.
ADJACENCY MATRIX  look up translate image
a Boolean matrix indicating for each pair of vertices I and J whether there is an edge from I to J.
ALL-PAIRS SHORTEST-PATH PROBLEM  look up translate image
given a weighted graph, find the shortest path between every pair of vertices.
ALPHA-BETA PRUNING  look up translate image
an algorithm used to determine the minimax value of a game tree. Alpha-beta algorithm avoids searching subtrees whose evaluation cannot influence the outcome of the search.
AMDAHL'S LAW  look up translate image
A rule first formalised by Gene Amdahl in 1967, which states that if F is the fraction of a calculation that is serial and 1-F the fraction that can be parallelized, then the speedup that can be achieved using P processors is: 1/( F + (1-F)/P) which has a limiting value of 1/F for an infinite number of processors. This no matter how many processors are employed, if a calculation has a 10% serial component, the maximum speedup obtainable is 10.
AMI  look up translate image
alternate mark inversion, a line code used for T1 and E1 lines that has a 12.5% ones density minimum, and the one conditions of the signal alternate between positive and negative polarity.
AND TREE  look up translate image
a search tree whose nonterminal nodes are all AND nodes.
AND-PARALLELISM  look up translate image
A form of parallelism exploited by some implementations of parallel logic programming languages, in which the terms in conjunctions are evaluated simultaneously, and parent computations are allowed to proceed only once their immediate children have completed. See also OR-parallelism .
AND/OR TREE  look up translate image
a search tree with both AND and OR nonterminal nodes.
ANSI  look up translate image
American National Standards Institute, a United States based organization which develops standards and defines interfaces for telecommunications amongst other things.
ANTIDEPENDENCE  look up translate image
See dependence.
APPLETALK  look up translate image
Apple Computer's proprietary network suite of protocols.applicative language a language that performs all computations by applying functions to values.
ARCHITECTURE  look up translate image
The basic plan along which a computer has been constructed. Popular parallel architectures include processor arrays, bus-based multiprocessors (with caches of various sizes and structures) and disjoint memory multicomputers. See also Flynn's taxonomy.
ARITY  look up translate image
The number of arguments taken by a function. Arity is also sometimes used in place of valence.
ARP  look up translate image
Address resolution protocol under TCP/IP used to dynamically bind a high level IP address to a low-level physical hardware address. ARP is limited to a single physical network that supports hardware broadcasting.
ARPANET  look up translate image
The US Advanced Research Project Agency network, which was the first large multi-site computer network.
ARRAY CONSTANT  look up translate image
an array reference within an iterative loop, all of whose subscripts are invariant.
ARRAY PROCESSOR  look up translate image
Any computer designed primarily to perform data parallel calculations on arrays or matrices. The two principle architectures used are the processor array and the vector processor.
ARTIFICIAL INTELLIGENCE  look up translate image
A class of problems such as pattern recognition, decision making and learning in which humans are clearly very proficient compared with current computers.
ASSOCIATIVE ADDRESS  look up translate image
a method whereby access is made to an item whose key matches an access key, as distinct from an access to an item at a specific address in memory. See associative memory.
ASSOCIATIVE MEMORY  look up translate image
Memory that can be accessed by content rather than by address; content addressable is often used synonymously. An associative memory permits its user to specify part of a pattern or key and retrieve the values associated with that pattern. The tuple space used to implement the generative communication model is an associative memory.
ASSOCIATIVE PROCESSOR  look up translate image
a processor array with associative memory.
ASYNCHRONOUS  look up translate image
A method of transmission which does not require a common clock, but separates fields of data by stop and start bits.
ASYNCHRONOUS ALGORITHM  look up translate image
See relaxation method.
ASYNCHRONOUS MESSAGE PASSING  look up translate image
See message passing .
ASYNCHRONOUS TRANSFER MODE  look up translate image
A broadband cell relay protocol that cuts subscriber data into fixed size packets for transfer across the wide area network.
ATM  look up translate image
See asynchronous transfer mode.
ATOMIC  look up translate image
Not interruptible. An atomic operation is one that always appears to have been executed as a unit.
ATTACHED VECTOR-PROCESSOR  look up translate image
A specialised processor for vector computations, designed to be connected to a general purpose host processor. The host processor supplies I/O functions, a file system and other aspects of a computing system environment.
AUTOMATIC VECTORIZATION  look up translate image
A compiler that takes code written in a serial language (often Fortran or C) and translates it into vector instructions. The vector instructions may be machine specific or in a source form such as array extensions or as subroutine calls to a vector library. See also compiler optimization.
AUXILIARY MEMORY  look up translate image
Memory that is usually large, in capacity, but slow and inexpensive, often a rotating magnetic or optical memory, whose main function is to store large volumes of data and programs not being actively used by the processors.
AVL TREE  look up translate image
binary tree having the property that for any node in the tree, the difference in height between the left and right subtrees of that node is no more than 1.
B8ZS  look up translate image
Bipolar with eight zero substitution, a line code used for T1 which converts any string of 8 zeros of a DS-1 signal into a code which at the far end is converted back to eight zeros. The coding actually inserts BPVs that are realized at the next multiplexer point and that taken out of the signal.
BACK SUBSTITUTION  look up translate image
See LU decomposition.
BANDED MATRIX  look up translate image
a matrix in which the non-zero elements are clustered around the main diagonal. If all the non-zero elements in the matrix are within m columns of the main diagonal, then the bandwidth of the matrix is 2m+1.
BANDWIDTH  look up translate image
The communications capacity (measured in bits per second) of a transmission line or of a specific path through the network. Contiguous bandwidth is a synonym for consecutive grouped channels in mux, switch or DACS; i.e. 256kbps (4 64kbps channels).
BANK CONFLICT  look up translate image
A bank "busy-wait" situation. Memory chip speeds are relatively slow when required to deliver a single word, so supercomputer memories are placed in a large number of independent banks (usually a power of 2). A vector of data laid out contiguously in memory with one component per successive bank, can be accessed at one word per cycle (despite the intrinsic slowness of the chips) through the use of pipelined delivery of vector-component words at high bandwidth. When the number of banks is a power of two, then vectors requiring strides of a power of 2 can run into a bank conflict.
BANK CYCLE TIME  look up translate image
The time, measured in clock cycles, taken by a memory bank between the honoring of one request to fetch or store a data item and accepting another such request. On most supercomputers this value is either four or eight clock cycles. See also prefetch.
BARRIER  look up translate image
A point in a program at which barrier synchronization occurs. See also fuzzy barrier.
BARRIER SYNCHRONIZATION  look up translate image
An event in which two or more processes belonging to some implicit or explicit group block until all members of the group have blocked. They may then all proceed. No member of the group may pass a barrier until all processes in the group have reached it. See also fuzzy barrier.
BASIC BLOCK  look up translate image
A section of program that does not cross any conditional branches, loop boundaries or other transfers of control. Most compiler optimization is done within basic blocks.
BATCH SEARCH  look up translate image
a concurrent search for a number of names.
BENCHMARK  look up translate image
a quantitative measure of performance for a computing system. The measure may be in terms of computational performance, which is often rated in FLOPS, or in terms of memory speed, or communications bandwidth or some more application-oriented measure such as LIPS or OLTPS. A collection of benchmark results for many computer systems is available on line from the National Software Exchange.
BERNSTEIN'S CONDITION  look up translate image
A sufficient condition for the independence of two sections of a program as stated by Bernstein in 1966. If Ri(Wi) is the set of variables read(written) by a section of code i, then Bernstein's Condition states that sections i and j may be executed in an arbitrary order, or concurrently if: there is no true dependence, output dependence or antidependence among the statements in the sections.
BGP  look up translate image
border gateway protocol.
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Glossary of high performance computing terms
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Created by admin
Created on 2014-01-14 17:07:38
Number of terms 678
Last added XNS by admin
2014-01-14 17:11:29
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